TY - BOOK
T1 - 3D integration for VLSI systems
AU - Tan, Chuan Seng
AU - Chen, Kuan-Neng
AU - Koester, Steven
PY - 2016/4/19
Y1 - 2016/4/19
N2 - Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usually include a stack of several thinned IC layers that are vertically bonded and interconnected by through silicon via TSV. There is a long string of benefits that one can derive from 3D IC implementation such as form factor, density multiplication, improved delay and power, enhanced bandwidth, and heterogeneous integration. This book presents contributions by key researchers in this field, covering motivations, technology platforms, applications, and other design issues.
AB - Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usually include a stack of several thinned IC layers that are vertically bonded and interconnected by through silicon via TSV. There is a long string of benefits that one can derive from 3D IC implementation such as form factor, density multiplication, improved delay and power, enhanced bandwidth, and heterogeneous integration. This book presents contributions by key researchers in this field, covering motivations, technology platforms, applications, and other design issues.
UR - http://www.scopus.com/inward/record.url?scp=85052899079&partnerID=8YFLogxK
U2 - 10.4032/9789814303828
DO - 10.4032/9789814303828
M3 - Book
AN - SCOPUS:84867895405
SN - 9789814303811
BT - 3D integration for VLSI systems
PB - Pan Stanford Publishing Pte. Ltd.
ER -