3510-V 390-mΩ · cm2 4H-SiC lateral JFET on a semi-insulating substrate

Chih Fang Huang*, Cheng Li Kan, Tian-Li Wu, Meng Ghia Lee, Yo Zthu Liu, Kung Yen Lee, Feng Zhao

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

9 Scopus citations


The performance of high-voltage 4H-SiC lateral JFETs on a semi-insulating substrate is reported in this letter. The design of the voltage-supporting layers is based on the charge compensation of p- and n-type epilayers. The best measured breakdown voltage is 3510 V, which, to the authors' knowledge, is the highest value ever reported for SiC lateral switching devices. The Ron of this device is 390 390-mΩ · cm2, in which 61% is due to the drift-region resistance. The BV2/Ron is 32 MW/ cm2, which is typical among other reported SiC lateral devices.

Original languageEnglish
Pages (from-to)957-959
Number of pages3
JournalIEEE Electron Device Letters
Issue number9
StatePublished - 7 Aug 2009


  • High voltage
  • JFETs
  • Lateral
  • Silicon carbide


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