2.4-GHz 7.4-mW 300-kHz flicker-noise-corner direct conversion receiver using 0.18 μm CMOS and deep-n-well NPN BJT

Wei Ling Chang*, Chin-Chun Meng, Jin Siang Syu, Chia Ling Wang, Guo Wei Huang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

A low-power low-flicker-noise receiver is demonstrated using 0.18 μm CMOS technology. Vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are used to substitute the mixer switching core and the input stage of subsequent IF VGA. Compared with the conventional CMOS mixer, the excellent flicker noise performance is obtained. As a result, the receiver achieves a 47 dB voltage gain at 2.4-GHz, and the noise figure is 9.6 dB at IF=100 kHz and 5.6 dB for IF>300 kHz. The total current consumption is 4.3 mA at 1.8 V supply voltage.

Original languageEnglish
Title of host publicationRSW 2013 - 2013 IEEE Radio and Wireless Symposium - RWW 2013
Pages223-225
Number of pages3
DOIs
StatePublished - 1 May 2013
Event2013 IEEE Radio and Wireless Symposium, RSW 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013 - Austin, TX, United States
Duration: 20 Jan 201323 Jan 2013

Publication series

NameIEEE Radio and Wireless Symposium, RWS
ISSN (Print)2164-2958
ISSN (Electronic)2164-2974

Conference

Conference2013 IEEE Radio and Wireless Symposium, RSW 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013
Country/TerritoryUnited States
CityAustin, TX
Period20/01/1323/01/13

Keywords

  • deep-n-well vertical-NPN bipolar junction transistor
  • direct-conversion receiver
  • Gilbert cell mixer
  • low flicker noise
  • low power
  • poly phase filter

Fingerprint

Dive into the research topics of '2.4-GHz 7.4-mW 300-kHz flicker-noise-corner direct conversion receiver using 0.18 μm CMOS and deep-n-well NPN BJT'. Together they form a unique fingerprint.

Cite this