0.5-V input digital low-dropout regulator (LDO) with 98.7% current efficiency in 65nm CMOS

Yasuyuki Okuma; Koichi Ishida; Yoshikatsu Ryu; Xin Zhang; Po-Hung Chen; Kazunori Watanabe; Makoto Takamiya; Takayasu Sakurai

doi:10.1587/transele.E94.C.938

0.5-V input digital low-dropout regulator (LDO) with 98.7% current efficiency in 65nm CMOS

Yasuyuki Okuma^*, Koichi Ishida, Yoshikatsu Ryu, Xin Zhang, Po-Hung Chen, Kazunori Watanabe, Makoto Takamiya, Takayasu Sakurai

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to journal › Article › peer-review

14 Scopus citations

Abstract

In this paper, Digital Low Dropout Regulator (LDO) is proposed to provide the low noise and tunable power supply voltage to the 0.5-V near-threshold logic circuits. Because the conventional LDO feedback-controlled by the operational amplifier fail to operate at 0.5V, the digital LDO eliminates all analog circuits and is controlled by digital circuits, which enables the 0.5-V operation. The developed digital LDO in 65 nm CMOS achieved the 0.5-V input voltage and 0.45-V output voltage with 98.7% current efficiency and 2.7-μA quiescent current at 200-μA load current. Both the input voltage and the quiescent current are the lowest values in the published LDO's, which indicates the good energy efficiency of the digital LDO at 0.5-V operation.

Original language	English
Pages (from-to)	938-944
Number of pages	7
Journal	IEICE Transactions on Electronics
Volume	E94-C
Issue number	6
DOIs	https://doi.org/10.1587/transele.E94.C.938
State	Published - Jun 2011

Keywords

Digital control
Low dropout regulator
Low voltage

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This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1587/transele.E94.C.938

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title = "0.5-V input digital low-dropout regulator (LDO) with 98.7% current efficiency in 65nm CMOS",

abstract = "In this paper, Digital Low Dropout Regulator (LDO) is proposed to provide the low noise and tunable power supply voltage to the 0.5-V near-threshold logic circuits. Because the conventional LDO feedback-controlled by the operational amplifier fail to operate at 0.5V, the digital LDO eliminates all analog circuits and is controlled by digital circuits, which enables the 0.5-V operation. The developed digital LDO in 65 nm CMOS achieved the 0.5-V input voltage and 0.45-V output voltage with 98.7% current efficiency and 2.7-μA quiescent current at 200-μA load current. Both the input voltage and the quiescent current are the lowest values in the published LDO's, which indicates the good energy efficiency of the digital LDO at 0.5-V operation.",

keywords = "Digital control, Low dropout regulator, Low voltage",

author = "Yasuyuki Okuma and Koichi Ishida and Yoshikatsu Ryu and Xin Zhang and Po-Hung Chen and Kazunori Watanabe and Makoto Takamiya and Takayasu Sakurai",

year = "2011",

month = jun,

doi = "10.1587/transele.E94.C.938",

language = "English",

volume = "E94-C",

pages = "938--944",

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T1 - 0.5-V input digital low-dropout regulator (LDO) with 98.7% current efficiency in 65nm CMOS

AU - Okuma, Yasuyuki

AU - Ishida, Koichi

AU - Ryu, Yoshikatsu

AU - Zhang, Xin

AU - Chen, Po-Hung

AU - Watanabe, Kazunori

AU - Takamiya, Makoto

AU - Sakurai, Takayasu

PY - 2011/6

Y1 - 2011/6

N2 - In this paper, Digital Low Dropout Regulator (LDO) is proposed to provide the low noise and tunable power supply voltage to the 0.5-V near-threshold logic circuits. Because the conventional LDO feedback-controlled by the operational amplifier fail to operate at 0.5V, the digital LDO eliminates all analog circuits and is controlled by digital circuits, which enables the 0.5-V operation. The developed digital LDO in 65 nm CMOS achieved the 0.5-V input voltage and 0.45-V output voltage with 98.7% current efficiency and 2.7-μA quiescent current at 200-μA load current. Both the input voltage and the quiescent current are the lowest values in the published LDO's, which indicates the good energy efficiency of the digital LDO at 0.5-V operation.

AB - In this paper, Digital Low Dropout Regulator (LDO) is proposed to provide the low noise and tunable power supply voltage to the 0.5-V near-threshold logic circuits. Because the conventional LDO feedback-controlled by the operational amplifier fail to operate at 0.5V, the digital LDO eliminates all analog circuits and is controlled by digital circuits, which enables the 0.5-V operation. The developed digital LDO in 65 nm CMOS achieved the 0.5-V input voltage and 0.45-V output voltage with 98.7% current efficiency and 2.7-μA quiescent current at 200-μA load current. Both the input voltage and the quiescent current are the lowest values in the published LDO's, which indicates the good energy efficiency of the digital LDO at 0.5-V operation.

KW - Digital control

KW - Low dropout regulator

KW - Low voltage

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VL - E94-C

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JO - IEICE Transactions on Electronics

JF - IEICE Transactions on Electronics

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ER -

0.5-V input digital low-dropout regulator (LDO) with 98.7% current efficiency in 65nm CMOS

Abstract

Keywords

UN SDGs

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