0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

Yun Sheng Chan; Po-Tsang Huang; Shang Lin Wu; Sheng Chi Lung; Wei Chang Wang; Wei Hwang; Ching Te Chuang

doi:10.1109/SOCC.2018.8618562

0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

Yun Sheng Chan
, Po-Tsang Huang
, Shang Lin Wu
, Sheng Chi Lung
, Wei Chang Wang
, Wei Hwang
, Ching Te Chuang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

This paper presents a near-threshold configurable ternary content addressable memory (TCAM) design for energy-constrained neural network or software-defined network (SDN) applications. A TCAM architecture based on foundry-based 6 T SRAM mini-array improves area efficiency and minimizes disturbs to enable operation down to 0.4V, and provides configurable lookup tables for users. To minimize dynamic power consumption, hierarchical precharge structure (HPRE) and don't-care based ripple search-line scheme are utilized for decreasing both the switching activities and wire capacitance. Moreover, power-gating technique, self-timed control and V _trip -tracking write-assist are used to reduce standby power, speed-up propagation delays of global signals and improve write-ability at low voltage, respectively. A reconfigurable TCAM is implemented using UMC 28nm high-k metal gate (HKMG) CMOS process. The design achieves operating frequency of 240MHz (20MHz) with energy consumption of 1.146 (0.621) fJ/bit/search at 0.9V (0.4V).

Original language	English
Title of host publication	Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018
Editors	Ramalingam Sridhar, Massimo Alioto, Mircea Stan, Karan Bhatia, Helen Li
Publisher	IEEE Computer Society
Pages	67-71
Number of pages	5
ISBN (Electronic)	9781538614907
DOIs	https://doi.org/10.1109/SOCC.2018.8618562
State	Published - 17 Jan 2019
Event	31st IEEE International System on Chip Conference, SOCC 2018 - Arlington, United States Duration: 4 Sep 2018 → 7 Sep 2018

Publication series

Name	International System on Chip Conference
Volume	2018-September
ISSN (Print)	2164-1676
ISSN (Electronic)	2164-1706

Conference

Conference	31st IEEE International System on Chip Conference, SOCC 2018
Country/Territory	United States
City	Arlington
Period	4/09/18 → 7/09/18

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

SRAM mini array
TCAM
low-voltage
near-threshold

Access to Document

10.1109/SOCC.2018.8618562

Cite this

Chan, Y. S., Huang, P.-T., Wu, S. L., Lung, S. C., Wang, W. C., Hwang, W., & Chuang, C. T. (2019). 0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process. In R. Sridhar, M. Alioto, M. Stan, K. Bhatia, & H. Li (Eds.), Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018 (pp. 67-71). Article 8618562 (International System on Chip Conference; Vol. 2018-September). IEEE Computer Society. https://doi.org/10.1109/SOCC.2018.8618562

Chan, Yun Sheng ; Huang, Po-Tsang ; Wu, Shang Lin et al. / 0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process. Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018. editor / Ramalingam Sridhar ; Massimo Alioto ; Mircea Stan ; Karan Bhatia ; Helen Li. IEEE Computer Society, 2019. pp. 67-71 (International System on Chip Conference).

@inproceedings{bfba21ca3a724b74b1c1120bae567b26,

title = "0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process",

abstract = " This paper presents a near-threshold configurable ternary content addressable memory (TCAM) design for energy-constrained neural network or software-defined network (SDN) applications. A TCAM architecture based on foundry-based 6 T SRAM mini-array improves area efficiency and minimizes disturbs to enable operation down to 0.4V, and provides configurable lookup tables for users. To minimize dynamic power consumption, hierarchical precharge structure (HPRE) and don't-care based ripple search-line scheme are utilized for decreasing both the switching activities and wire capacitance. Moreover, power-gating technique, self-timed control and V trip -tracking write-assist are used to reduce standby power, speed-up propagation delays of global signals and improve write-ability at low voltage, respectively. A reconfigurable TCAM is implemented using UMC 28nm high-k metal gate (HKMG) CMOS process. The design achieves operating frequency of 240MHz (20MHz) with energy consumption of 1.146 (0.621) fJ/bit/search at 0.9V (0.4V). ",

keywords = "SRAM mini array, TCAM, low-voltage, near-threshold",

author = "Chan, \{Yun Sheng\} and Po-Tsang Huang and Wu, \{Shang Lin\} and Lung, \{Sheng Chi\} and Wang, \{Wei Chang\} and Wei Hwang and Chuang, \{Ching Te\}",

year = "2019",

month = jan,

day = "17",

doi = "10.1109/SOCC.2018.8618562",

language = "English",

series = "International System on Chip Conference",

publisher = "IEEE Computer Society",

pages = "67--71",

editor = "Ramalingam Sridhar and Massimo Alioto and Mircea Stan and Karan Bhatia and Helen Li",

booktitle = "Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018",

address = "美國",

note = "31st IEEE International System on Chip Conference, SOCC 2018 ; Conference date: 04-09-2018 Through 07-09-2018",

}

Chan, YS, Huang, P-T, Wu, SL, Lung, SC, Wang, WC, Hwang, W & Chuang, CT 2019, 0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process. in R Sridhar, M Alioto, M Stan, K Bhatia & H Li (eds), Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018., 8618562, International System on Chip Conference, vol. 2018-September, IEEE Computer Society, pp. 67-71, 31st IEEE International System on Chip Conference, SOCC 2018, Arlington, United States, 4/09/18. https://doi.org/10.1109/SOCC.2018.8618562

0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process. / Chan, Yun Sheng; Huang, Po-Tsang; Wu, Shang Lin et al.
Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018. ed. / Ramalingam Sridhar; Massimo Alioto; Mircea Stan; Karan Bhatia; Helen Li. IEEE Computer Society, 2019. p. 67-71 8618562 (International System on Chip Conference; Vol. 2018-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - 0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

AU - Chan, Yun Sheng

AU - Huang, Po-Tsang

AU - Wu, Shang Lin

AU - Lung, Sheng Chi

AU - Wang, Wei Chang

AU - Hwang, Wei

AU - Chuang, Ching Te

PY - 2019/1/17

Y1 - 2019/1/17

N2 - This paper presents a near-threshold configurable ternary content addressable memory (TCAM) design for energy-constrained neural network or software-defined network (SDN) applications. A TCAM architecture based on foundry-based 6 T SRAM mini-array improves area efficiency and minimizes disturbs to enable operation down to 0.4V, and provides configurable lookup tables for users. To minimize dynamic power consumption, hierarchical precharge structure (HPRE) and don't-care based ripple search-line scheme are utilized for decreasing both the switching activities and wire capacitance. Moreover, power-gating technique, self-timed control and V trip -tracking write-assist are used to reduce standby power, speed-up propagation delays of global signals and improve write-ability at low voltage, respectively. A reconfigurable TCAM is implemented using UMC 28nm high-k metal gate (HKMG) CMOS process. The design achieves operating frequency of 240MHz (20MHz) with energy consumption of 1.146 (0.621) fJ/bit/search at 0.9V (0.4V).

AB - This paper presents a near-threshold configurable ternary content addressable memory (TCAM) design for energy-constrained neural network or software-defined network (SDN) applications. A TCAM architecture based on foundry-based 6 T SRAM mini-array improves area efficiency and minimizes disturbs to enable operation down to 0.4V, and provides configurable lookup tables for users. To minimize dynamic power consumption, hierarchical precharge structure (HPRE) and don't-care based ripple search-line scheme are utilized for decreasing both the switching activities and wire capacitance. Moreover, power-gating technique, self-timed control and V trip -tracking write-assist are used to reduce standby power, speed-up propagation delays of global signals and improve write-ability at low voltage, respectively. A reconfigurable TCAM is implemented using UMC 28nm high-k metal gate (HKMG) CMOS process. The design achieves operating frequency of 240MHz (20MHz) with energy consumption of 1.146 (0.621) fJ/bit/search at 0.9V (0.4V).

KW - SRAM mini array

KW - TCAM

KW - low-voltage

KW - near-threshold

UR - https://www.scopus.com/pages/publications/85062242855

U2 - 10.1109/SOCC.2018.8618562

DO - 10.1109/SOCC.2018.8618562

M3 - Conference contribution

AN - SCOPUS:85062242855

T3 - International System on Chip Conference

SP - 67

EP - 71

BT - Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018

A2 - Sridhar, Ramalingam

A2 - Alioto, Massimo

A2 - Stan, Mircea

A2 - Bhatia, Karan

A2 - Li, Helen

PB - IEEE Computer Society

T2 - 31st IEEE International System on Chip Conference, SOCC 2018

Y2 - 4 September 2018 through 7 September 2018

ER -

Chan YS, Huang PT, Wu SL, Lung SC, Wang WC, Hwang W et al. 0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process. In Sridhar R, Alioto M, Stan M, Bhatia K, Li H, editors, Proceedings - 31st IEEE International System on Chip Conference, SOCC 2018. IEEE Computer Society. 2019. p. 67-71. 8618562. (International System on Chip Conference). doi: 10.1109/SOCC.2018.8618562

0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

Abstract

Publication series

Conference

UN SDGs

Keywords

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