0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

Po-Tsang Huang; Shu Lin Lai; Ching Te Chuang; Wei Hwang; Jason Huang; Angelo Hu; Paul Kan; Michael Jia; Kimi Lv; Bright Zhang

doi:10.1109/ASSCC.2014.7008877

0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

Po-Tsang Huang, Shu Lin Lai, Ching Te Chuang, Wei Hwang, Jason Huang, Angelo Hu, Paul Kan, Michael Jia, Kimi Lv, Bright Zhang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

10 Scopus citations

Abstract

In this paper, a 256×40 energy-efficient ternary content addressable memory (TCAM) macro is designed and implemented in 40nm low power (LP) CMOS. Due to the thicker gate oxide in LP process, a 16T TCAM cell with p-type comparison circuits is proposed to increase the I_on/I_off difference of the dynamic circuitry. To further improve energy efficiency, don't-care-based ripple search-lines/bit-lines are used to reduce both the switching activities and wire capacitance. Moreover, column-based data-aware power control is employed for leakage power reduction and write-ability improvements. The experimental results show a leakage power reduction of 28.9%, a search-line power reduction of 31.74% and an energy efficiency metric of the TCAM macro of 0.339 fJ/bit/search.

Original language	English
Title of host publication	Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	129-132
Number of pages	4
ISBN (Electronic)	9781479940905
DOIs	https://doi.org/10.1109/ASSCC.2014.7008877
State	Published - 13 Jan 2015
Event	2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 - Kaohsiung, Taiwan Duration: 10 Nov 2014 → 12 Nov 2014

Publication series

Name	Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014

Conference

Conference	2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014
Country/Territory	Taiwan
City	Kaohsiung
Period	10/11/14 → 12/11/14

Keywords

Embedded memory
TCAM
energy-efficient

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1109/ASSCC.2014.7008877

Cite this

Huang, P.-T., Lai, S. L., Chuang, C. T., Hwang, W., Huang, J., Hu, A., Kan, P., Jia, M., Lv, K., & Zhang, B. (2015). 0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS. In Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 (pp. 129-132). Article 7008877 (Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASSCC.2014.7008877

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title = "0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS",

abstract = "In this paper, a 256×40 energy-efficient ternary content addressable memory (TCAM) macro is designed and implemented in 40nm low power (LP) CMOS. Due to the thicker gate oxide in LP process, a 16T TCAM cell with p-type comparison circuits is proposed to increase the Ion/Ioff difference of the dynamic circuitry. To further improve energy efficiency, don't-care-based ripple search-lines/bit-lines are used to reduce both the switching activities and wire capacitance. Moreover, column-based data-aware power control is employed for leakage power reduction and write-ability improvements. The experimental results show a leakage power reduction of 28.9%, a search-line power reduction of 31.74% and an energy efficiency metric of the TCAM macro of 0.339 fJ/bit/search.",

keywords = "Embedded memory, TCAM, energy-efficient",

author = "Po-Tsang Huang and Lai, {Shu Lin} and Chuang, {Ching Te} and Wei Hwang and Jason Huang and Angelo Hu and Paul Kan and Michael Jia and Kimi Lv and Bright Zhang",

year = "2015",

month = jan,

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doi = "10.1109/ASSCC.2014.7008877",

language = "English",

series = "Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014",

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pages = "129--132",

booktitle = "Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014",

address = "United States",

note = "2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 ; Conference date: 10-11-2014 Through 12-11-2014",

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Huang, P-T, Lai, SL, Chuang, CT, Hwang, W, Huang, J, Hu, A, Kan, P, Jia, M, Lv, K & Zhang, B 2015, 0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS. in Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014., 7008877, Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014, Institute of Electrical and Electronics Engineers Inc., pp. 129-132, 2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014, Kaohsiung, Taiwan, 10/11/14. https://doi.org/10.1109/ASSCC.2014.7008877

0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS. / Huang, Po-Tsang; Lai, Shu Lin; Chuang, Ching Te et al.
Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014. Institute of Electrical and Electronics Engineers Inc., 2015. p. 129-132 7008877 (Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - 0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

AU - Huang, Po-Tsang

AU - Lai, Shu Lin

AU - Chuang, Ching Te

AU - Hwang, Wei

AU - Huang, Jason

AU - Hu, Angelo

AU - Kan, Paul

AU - Jia, Michael

AU - Lv, Kimi

AU - Zhang, Bright

PY - 2015/1/13

Y1 - 2015/1/13

N2 - In this paper, a 256×40 energy-efficient ternary content addressable memory (TCAM) macro is designed and implemented in 40nm low power (LP) CMOS. Due to the thicker gate oxide in LP process, a 16T TCAM cell with p-type comparison circuits is proposed to increase the Ion/Ioff difference of the dynamic circuitry. To further improve energy efficiency, don't-care-based ripple search-lines/bit-lines are used to reduce both the switching activities and wire capacitance. Moreover, column-based data-aware power control is employed for leakage power reduction and write-ability improvements. The experimental results show a leakage power reduction of 28.9%, a search-line power reduction of 31.74% and an energy efficiency metric of the TCAM macro of 0.339 fJ/bit/search.

AB - In this paper, a 256×40 energy-efficient ternary content addressable memory (TCAM) macro is designed and implemented in 40nm low power (LP) CMOS. Due to the thicker gate oxide in LP process, a 16T TCAM cell with p-type comparison circuits is proposed to increase the Ion/Ioff difference of the dynamic circuitry. To further improve energy efficiency, don't-care-based ripple search-lines/bit-lines are used to reduce both the switching activities and wire capacitance. Moreover, column-based data-aware power control is employed for leakage power reduction and write-ability improvements. The experimental results show a leakage power reduction of 28.9%, a search-line power reduction of 31.74% and an energy efficiency metric of the TCAM macro of 0.339 fJ/bit/search.

KW - Embedded memory

KW - TCAM

KW - energy-efficient

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M3 - Conference contribution

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T3 - Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014

SP - 129

EP - 132

BT - Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014

Y2 - 10 November 2014 through 12 November 2014

ER -

Huang PT, Lai SL, Chuang CT, Hwang W, Huang J, Hu A et al. 0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS. In Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014. Institute of Electrical and Electronics Engineers Inc. 2015. p. 129-132. 7008877. (Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014). doi: 10.1109/ASSCC.2014.7008877

0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

Abstract

Publication series

Conference

Keywords

UN SDGs

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