Projects per year
Personal profile
Research Interests
Mixed-signal Integrated Circuits, High Frequency Circuits, Communication System
Experience
Education/Academic qualification
PhD, Electronics Engineering, National Chiao Tung University
External positions
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Dive into the research topics where Wei-Zen Chen is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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產學合作計畫-使用PAM-6 調變之高密度資料連結系統
1/11/22 → 31/10/23
Project: Government Ministry › Other Government Ministry Institute
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Clock Generation and Timing Recovery for Advanced Data Link Transceivers
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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Clock Generation and Timing Recovery for Advanced Data Link Transceivers
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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產學合作計畫-寬頻多模式有線傳輸發射機(2/2)
1/11/21 → 31/10/22
Project: Government Ministry › Other Government Ministry Institute
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A 1.68-23.2-Gb/s Reference-Less Half-Rate Receiver With an ISI-Tolerant Unlimited Range Frequency Detector
Huang, Y. P., Chang, Y. W. & Chen, W. Z., 2022, In: IEEE Solid-State Circuits Letters. 5, p. 186-189 4 p.Research output: Contribution to journal › Article › peer-review
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A 103 fJ/b/dB, 10-26 Gbps Receiver with a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement
Liu, Y. C., Chen, W. Z., Lee, Y. S., Chen, Y. H., Min, S. & Lin, Y. H., 2022, 2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022 - Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A Reference-Free Phase Noise Measurement Circuit Achieving 24.2-fs Periodic Jitter Sensitivity and 275-fs<inline-formula> <tex-math notation="LaTeX">$_{\mathrm{rms}}$</tex-math> </inline-formula> Resolution With Background Self-Calibration
Jian, W. J. & Chen, W. Z., 2022, (Accepted/In press) In: IEEE Journal of Solid-State Circuits. p. 1-9 9 p.Research output: Contribution to journal › Article › peer-review
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A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fsrmsResolution with Background Self-Calibration
Jian, W. J. & Chen, W. Z., 2022, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., p. 8-9 2 p. (Digest of Technical Papers - Symposium on VLSI Technology; vol. 2022-June).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A 1.68-23.2 Gb/s Reference-Less Half-Rate Receiver with an ISI-Tolerant Unlimited Range Frequency Detector
Huang, Y. P., Chang, Y. W. & Chen, W. Z., 2021, Proceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference. Institute of Electrical and Electronics Engineers Inc., (Proceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review