Personal profile
Research Interests
Nanoscale Nonvolatile Memory, Molecular Electronics, Nanotechnology, Semiconductor Physics
Experience
Education/Academic qualification
PhD, Electrical Engineering, Cornell University
External positions
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- 1 Similar Profiles
Collaborations and top research areas from the last five years
Projects
- 33 Finished
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Exploring the third dimension of Moore's Law: Cost-effective multilayer stackable 2D nanosheet transistor
Hou, T.-H. (PI)
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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Ultralow-energy computing-in-memory technology– A cross-layer optimization from key device development to neuromorphic chip design
Hou, T.-H. (PI)
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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Exploring the third dimension of Moore's Law: Cost-effective multilayer stackable 2D nanosheet transistor
Hou, T.-H. (PI)
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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A世代前瞻半導體技術專案計畫推動辦公室(2/2)
Hou, T.-H. (PI)
1/05/22 → 30/04/23
Project: Government Ministry › Other Government Ministry Institute
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Ultralow-energy computing-in-memory technology– A cross-layer optimization from key device development to neuromorphic chip design
Hou, T.-H. (PI)
1/08/21 → 31/07/22
Project: Government Ministry › Other Government Ministry Institute
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A hardware demonstration of a universal programmable RRAM-based probabilistic computer for molecular docking
He, Y., Hong, M. C., Ding, Q., Lin, C. S., Lai, C. M., Fang, C., Gong, X., Hou, T. H. & Liang, G., Dec 2026, In: Nature Communications. 17, 1, 702.Research output: Contribution to journal › Article › peer-review
Open Access2 Scopus citations -
Antiferroelectric-based Memcapacitor and Strategy for Non-destructive Read Operation by Endurance Recovery
Liu, C. H., Hsiang, K. Y., Chang, F. S., Januar, M., Chang, Y. T., Liu, C. W., Hou, T. H. & Lee, M. H., 2026, (Accepted/In press) In: IEEE Electron Device Letters.Research output: Contribution to journal › Article › peer-review
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A Page-Buffer and Fail-Bit Counter-Based In-Memory Computing Platform for 3D NAND Flash Memory
Tsai, W. J., Lu, C. C., Hsieh, T. E., Lu, T. C., Chen, K. C., Hou, T. H. & Lu, C. Y., 2026, (Accepted/In press) In: IEEE Journal on Emerging and Selected Topics in Circuits and Systems.Research output: Contribution to journal › Article › peer-review
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A Robust Read-Based PUF Generation Method in a 3-D NAND Flash Memory
Chou, Y. L., Tsai, W. J., Lu, T. C., Chen, K. C., Hsien, T.-E., Hou, T. H. & Lu, C. Y., 2026, In: IEEE Transactions on Electron Devices. 73, 3, p. 1309-1315 7 p.Research output: Contribution to journal › Article › peer-review
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Bismuth Confinement: A Strategy for Low Resistance and Good Thermal Endurance of Integrated Contacts to MoS2
Wu, W. C., Hung, T. Y. T., Hsueh, F. K., Liu, B. H., Yun, W. S., Chung, Y. Y., Wang, Y. C., Lin, Z. R., Li, M. Z., Jian, Z. S., Hsu, S. H., Tsai, J. C., Chen, J. H., Chen, C. W., Li, Y., Chang, W. H., Woon, W. Y., Kei, C. C., Hou, T. H. & Cheng, C. C. & 2 others, , 31 Mar 2026, In: ACS Nano. 20, 12, p. 9817-9827 11 p.Research output: Contribution to journal › Article › peer-review
Open Access
Prizes
Activities
- 1 Editorial work
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Scientific Reports (Event)
Hou, T.-H. (Member of editorial board)
1 Jan 2018 → 31 Dec 2018Activity: Publication peer-review and editorial work › Editorial work