Calculated based on number of publications stored in Pure and citations from Scopus
Calculated based on number of publications stored in Pure and citations from Scopus
Calculated based on number of publications stored in Pure and citations from Scopus
20102024

Research activity per year

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Personal profile

Research Interests

· Computer Architecture
· Computer Systems
· Memory and Storage Systems
· Domain-specific Accelerators (GPU, Neural Processing Units)

Education/Academic qualification

PhD, Electrical Engineering, Purdue University

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Collaborations and top research areas from the last five years

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  • COLAB: Collaborative and Efficient Processing of Replicated Cache Requests in GPU

    Cheng, B. W., Huang, E. M., Chao, C. H., Sun, W. F., Yeh, T. T. & Lee, C. Y., 16 Jan 2023, ASP-DAC 2023 - 28th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 314-319 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • Lego: Dynamic Tensor-Splitting Multi-Tenant DNN Models on Multi-Chip-Module Architecture

    Xuan, Z. Y., Lee, C. J. & Yeh, T. T., 2022, Proceedings - International SoC Design Conference 2022, ISOCC 2022. Institute of Electrical and Electronics Engineers Inc., p. 173-174 2 p. (Proceedings - International SoC Design Conference 2022, ISOCC 2022).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • Deadline-Aware Offloading for High-Throughput Accelerators

    Yeh, T. T., Sinclair, M. D., Beckmann, B. M. & Rogers, T. G., Feb 2021, Proceeding - 27th IEEE International Symposium on High Performance Computer Architecture, HPCA 2021. IEEE Computer Society, p. 479-492 14 p. 9407162. (Proceedings - International Symposium on High-Performance Computer Architecture; vol. 2021-February).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    11 Scopus citations
  • Dimensionality-aware redundant SIMT instruction elimination

    Yeh, T. T., Green, R. N. & Rogers, T. G., 9 Mar 2020, ASPLOS 2020 - 25th International Conference on Architectural Support for Programming Languages and Operating Systems. Association for Computing Machinery, p. 1327-1340 14 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Open Access
    9 Scopus citations
  • Optimizing GPU Cache Policies for MI Workloads∗

    Alsop, J., Sinclair, M. D., Bharadwaj, S., Dutu, A., Gutierrez, A., Kayiran, O., Lebeane, M., Potter, B., Puthoor, S., Zhang, X., Yeh, T. T. & Beckmann, B. M., Nov 2019, Proceedings of the 2019 IEEE International Symposium on Workload Characterization, IISWC 2019. Institute of Electrical and Electronics Engineers Inc., p. 243-248 6 p. 9041977. (Proceedings of the 2019 IEEE International Symposium on Workload Characterization, IISWC 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations