Projects per year
Personal profile
Research Interests
Digital IP Authoring, VLSI/IC Design, Signal Processing Architecture Design, Image and Video Signal Processing, Computer Architecture Design
Experience
Education/Academic qualification
PhD, Electronics Engineering, National Chiao Tung University
External positions
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Dive into the research topics where Tian-Sheuan Chang is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Collaborations and top research areas from the last five years
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Projects
- 25 Finished
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高效脈衝神經網絡硬體加速器研究
Chang, T.-S. (PI)
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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智慧晶片系統與應用人才培育計畫-智慧終端裝置晶片系統與應用聯盟111年度計畫
Chang, T.-S. (PI)
1/08/22 → 31/03/23
Project: Government Ministry › Ministry of Education(Include School)
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高效脈衝神經網絡硬體加速器研究
Chang, T.-S. (PI)
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
-
高效脈衝神經網絡硬體加速器研究
Chang, T.-S. (PI)
1/08/21 → 31/07/22
Project: Government Ministry › Other Government Ministry Institute
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智慧晶片系統與應用人才培育計畫-智慧終端裝置晶片系統與應用聯盟110年度計畫
Chang, T.-S. (PI)
1/07/21 → 31/07/22
Project: Government Ministry › Ministry of Education(Include School)
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A 71.2-μW Speech Recognition Accelerator with Recurrent Spiking Neural Network
Yang, C. C. & Chang, T. S., 1 Jul 2024, In: IEEE Transactions on Circuits and Systems I: Regular Papers. 71, 7, p. 3203-3213 11 p.Research output: Contribution to journal › Article › peer-review
1 Scopus citations -
ACNPU: A 4.75TOPS/W 1080P@30FPS Super Resolution Accelerator With Decoupled Asymmetric Convolution
Yang, T. H. & Chang, T. S., 1 Feb 2024, In: IEEE Transactions on Circuits and Systems I: Regular Papers. 71, 2, p. 670-679 10 p.Research output: Contribution to journal › Article › peer-review
Open Access -
A Low-Power Streaming Speech Enhancement Accelerator for Edge Devices
Wu, C. H. & Chang, T. S., 2024, In: IEEE Open Journal of Circuits and Systems. 5, p. 128-140 13 p.Research output: Contribution to journal › Article › peer-review
Open Access -
A Multi-Bit Near-RRAM based Computing Macro with Highly Computing Parallelism for CNN Application
Lin, K. C., Zuo, H., Wang, H. Y., Huang, Y. P., Wu, C. H., Guo, Y. C., Jou, S. J., Hou, T. H. & Chang, T. S., 2024, 2024 Design, Automation and Test in Europe Conference and Exhibition, DATE 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (Proceedings -Design, Automation and Test in Europe, DATE).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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ASC: Adaptive Scale Feature Map Compression for Deep Neural Network
Yao, Y. & Chang, T. S., 1 Mar 2024, In: IEEE Transactions on Circuits and Systems I: Regular Papers. 71, 3, p. 1417-1428 12 p.Research output: Contribution to journal › Article › peer-review
Open Access