Projects per year
Personal profile
Research Interests
Reliability of Semiconductor Devices, Flash Memory, High-speed Devices and Circuits
Experience
Education/Academic qualification
PhD, Electrical Engineering, University of Illinois at Urbana-Champaign
External positions
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Dive into the research topics where Ta-Hui Wang is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Projects
- 25 Finished
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Analytical Model and Simulation of Read Induced Performance Degradation in RRAM-based Neuromorphic Circuits
1/08/21 → 31/10/22
Project: Government Ministry › Other Government Ministry Institute
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Frequency Response and Reliability in Negative Capacitance FET
1/08/20 → 31/07/21
Project: Government Ministry › Other Government Ministry Institute
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Accelerating Qualification Method for Data Retention in Post-SET/RESET Cycling RRAM and its Theory and Statistical Models.
1/08/20 → 31/10/21
Project: Government Ministry › Other Government Ministry Institute
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Frequency Response and Reliability in Negative Capacitance FET
1/08/19 → 31/07/20
Project: Government Ministry › Other Government Ministry Institute
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Accelerating Qualification Method for Data Retention in Post-SET/RESET Cycling RRAM and its Theory and Statistical Models.
1/08/19 → 31/10/20
Project: Government Ministry › Other Government Ministry Institute
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Simulation of read-disturb-induced inference accuracy degradation in an RRAM-based neuromorphic circuit
Jiang, C. M., Hsu, C. A. & Wang, T., Feb 2023, In: Journal of Computational Electronics. 22, 1, p. 596-600 5 p.Research output: Contribution to journal › Article › peer-review
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Interfacial-Layer Design for Hf1-xZrxO2-Based FTJ Devices: From Atom to Array
Chiang, H. L., Wang, J. F., Lin, K. H., Nien, C. H., Wu, J. J., Hsiang, K. Y., Chuu, C. P., Chen, Y. W., Zhang, X. W., Liu, C. W., Wang, T., Wang, C. C., Lee, M. H., Chang, M. F., Chang, C. S. & Chen, T. C., 2022, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., p. 361-362 2 p. (Digest of Technical Papers - Symposium on VLSI Technology; vol. 2022-June).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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An Analytical Model of Read-Disturb Failure Time in a Post-Cycling Resistive Switching Memory
Jiang, C. M., Wang, C. C., Li, K. S., Lin, C. C. & Wang, T., 2021, (Accepted/In press) In: IEEE Transactions on Device and Materials Reliability.Research output: Contribution to journal › Article › peer-review
1 Scopus citations -
Investigation of Vth Distribution Tails of Ground-Select-Line Cells and Edge Dummy Cells in a 3-D NAND Flash Memory
Chou, Y. L., Wang, T., Cheng, C. C., Lu, C. C., Wu, G. W., Ku, S. H., Chang, W., Tsai, W. J., Lu, T. C., Chen, K. C. & Lu, C. Y., May 2021, In: IEEE Transactions on Electron Devices. 68, 5, p. 2260 - 2264 5 p.Research output: Contribution to journal › Article › peer-review
2 Scopus citations -
Analytical Modeling of Read-Induced SET-State Conductance Change in a Hafnium-Oxide Resistive Switching Device
Su, P. C., Jiang, C. M., Chen, Y. J., Wang, C. C., Li, K. S., Lin, C. C. & Wang, T., Jan 2020, In: IEEE Transactions on Electron Devices. 67, 1, p. 113-117 5 p., 8935500.Research output: Contribution to journal › Article › peer-review
2 Scopus citations