Projects per year
Personal profile
Research Interests
Silicon-based Nanoelectronics, Compact Modeling for Circuit Simulation, Semiconductor Physics and Devices
Experience
Education/Academic qualification
PhD, Electrical Engineering and Computer Sciences, University of California, Berkeley
External positions
Fingerprint
Dive into the research topics where Pin Su is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
- 1 Similar Profiles
Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
Projects
- 20 Finished
-
Evaluation and Analysis of 2D FeFET Synapse for Neuromorphic Computing
Su, P. (PI)
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
-
次奈米節點鐵電電晶體關鍵技術：鐵電反鐵電材料與物理,低能耗邏輯與記憶體元件及其高效能運算(2/2)
Su, P. (PI)
1/05/22 → 30/04/23
Project: Government Ministry › Other Government Ministry Institute
-
Evaluation and Analysis of 2D FeFET Synapse for Neuromorphic Computing
Su, P. (PI)
1/08/21 → 31/07/22
Project: Government Ministry › Other Government Ministry Institute
-
Key Technologies of Ferroelectric FETs for Sub-Nanometer Nodes: Ferroelectric-Antiferroelectric Materials and Physics, Logic, Memory and Computation with Energy Efficiency
Su, P. (PI)
1/05/21 → 30/04/22
Project: Government Ministry › Other Government Ministry Institute
-
Investigation and Modeling for 2D-FeFET based Nonvolatile Memory
Su, P. (PI)
1/08/20 → 31/07/21
Project: Government Ministry › Other Government Ministry Institute
-
A Novel Logic-Compatible and Energy-Efficient Capacitorless DRAM Using CFETs
Semwal, S. & Su, P., 2026, In: IEEE Transactions on Electron Devices. 73, 1, p. 297-303 7 p.Research output: Contribution to journal › Article › peer-review
1 Scopus citations -
Electrically Configured Analog Signal Modulation and Logic Operation with Dual-Doped RFET
Semwal, S., Su, P. & Kranti, A., 2026, (Accepted/In press) In: IEEE Transactions on Nanotechnology.Research output: Contribution to journal › Article › peer-review
-
Enabling High-Speed, Low-Voltage Frequency and Phase Modulation with Complementary Field-Effect Transistors (CFETs)
Semwal, S. & Su, P., 2026, 2026 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2026 - Proceedings of Technical Papers. Institute of Electrical and Electronics Engineers Inc., (2026 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2026 - Proceedings of Technical Papers).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
-
Energy-Efficient All-Digital Computation-in-Memory Macro Design with CFeFET-based Booth Decoder
Yang, T. W., Lu, W., Huang, Y. Y., Su, P. & Huang, P. T., 2026, ISCAS 2026 - 2026 IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., p. 3206-3210 5 p. (Proceedings - IEEE International Symposium on Circuits and Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
-
Interfacial-Layer-Free NCFETs Achieving 2 mV Hysteresis, 27mV/dec SS, 2mV/V DIBL, and Record 2088μA/μ m Ion at VDS=Vov=0.5 V
Lin, M. K., Liang, J. Y., Liu, Y. Q., Chen, W. J., Hsu, J. Y., Wu, X. H., Dai, J. N., Chen, Y. J., Yu, B. H., Fan, Z. E., Mei, Y. M., Lee, M. H., Chu, M. W., Su, P., Hu, C. & Liu, C. W., 2026, 2026 IEEE/JSAP Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2026. Institute of Electrical and Electronics Engineers Inc., (Digest of Technical Papers - Symposium on VLSI Technology).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review