Projects per year
Personal profile
Research Interests
VLSI Testing, Statistical Timing Analysis, Physical Design Automation, Test Compression/Compaction
Experience
Education/Academic qualification
PhD, University of California, Santa Barbara
External positions
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Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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Machine-Learning Techniques and ATPG Methodologies for Reducing DPPM
1/08/21 → 31/07/22
Project: Government Ministry › Ministry of Science and Technology
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EDA Tool And Machine Learning Platform For IDDQ Testing
1/01/21 → 31/03/22
Project: Government Ministry › Ministry of Science and Technology
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Power-Distribution-Network Generation for Optimizing IR-Drop Aware Timing
1/08/20 → 31/07/21
Project: Government Ministry › Ministry of Science and Technology
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EDA Tool And Machine Learning Platform For IDDQ Testing
1/01/20 → 31/12/20
Project: Government Ministry › Ministry of Science and Technology
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Faster-than-1-measuremnt-per-DUT WAT test structure for measuring Vt
1/08/19 → 31/07/20
Project: Government Ministry › Ministry of Science and Technology
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Test Methodology for Defect-Based Bridge Faults
Chang, S. W., Nien, Y. T., Hu, Y. P., Wu, K. C., Wang, C. C., Huang, F. S., Tang, Y. L., Chen, Y. C., Chen, M. C. & Chao, M. C. T., 2022, (Accepted/In press) In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems.Research output: Contribution to journal › Article › peer-review
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Identifying good-dice-in-bad-neighborhoods using artificial neural networks
Yang, C. H., Yen, C. H., Wang, T. R., Chen, C. T., Chern, M., Chen, Y. Y., Lee, J. N., Kao, S. Y., Wu, K-C. & Chao, C-T., 25 Apr 2021, Proceedings - 2021 IEEE 39th VLSI Test Symposium, VTS 2021. IEEE Computer Society, 9441055. (Proceedings of the IEEE VLSI Test Symposium; vol. 2021-April).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Methodology of Generating Timing-Slack-Based Cell-Aware Tests
Nien, Y. T., Wu, K. C., Lee, D. Z., Chen, Y. Y., Chen, P. L., Chern, M., Lee, J. N., Kao, S. Y. & Chao, M. C. T., 2021, (Accepted/In press) In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.Research output: Contribution to journal › Article › peer-review
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CNN-based Stochastic Regression for IDDQ Outlier Identification
Chen, C. T., Yen, C. H., Wen, C. Y., Yang, C. H., Wu, K. C., Chern, M., Chen, Y. Y., Kuo, C. Y., Lee, J. N., Kao, S. Y. & Chao, M. C. T., Apr 2020, Proceedings - 2020 IEEE 38th VLSI Test Symposium, VTS 2020. IEEE Computer Society, 9107570. (Proceedings of the IEEE VLSI Test Symposium; vol. 2020-April).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Power Distribution Network Generation for Optimizing IR-Drop Aware Timing
Chang, W. H., Lin, L. Y., Chen, Y. G. & Chao, M. C. T., 2 Nov 2020, In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2020-November, 9256540.Research output: Contribution to journal › Conference article › peer-review
Open Access1 Scopus citations