Projects per year
Personal profile
Research Interests
Nano Devices, RF CMOS Device Modeling, High Performance Analog Device Design, Non-volatile Memory Device Design & Reliability, SoC Integration Technology
Experience
Education/Academic qualification
PhD, Electronics Engineering, National Yang Ming Chiao Tung University
External positions
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Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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毫米波元件與電路協同設計及精實模型研發應用於毫米波高增益與低雜訊放大器以及建構於奈米矽平面與鰭式電晶體技術
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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毫米波元件與電路協同設計及精實模型研發應用於毫米波高增益與低雜訊放大器以及建構於奈米矽平面與鰭式電晶體技術
1/08/24 → 31/07/25
Project: Government Ministry › Other Government Ministry Institute
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毫米波元件與電路協同設計及精實模型研發應用於毫米波高增益與低雜訊放大器以及建構於奈米矽平面與鰭式電晶體技術
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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Millimeter-Wave CMOS Devices and Transmission Lines Design and Compact Models in Nano Silicon Planar CMOS and FinFET Technologies
1/08/21 → 31/12/22
Project: Government Ministry › Other Government Ministry Institute
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New Compact Models with Layout Dependent Parasitic Effects and Improvement Solutions for Low Power and Low Noise mm-wave Devices and Circuits Co-design
1/08/20 → 31/12/21
Project: Government Ministry › Other Government Ministry Institute
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A Built-in Spice Time-domain Variation Model of the BTI-induced Random Trap Fluctuation (RTF) in 14 nm FinFETs
Lin, L. C., Wang, Z. Y., Lee, M. Y., Chang, J. K., Hsieh, E. R., Guo, J. C. & Chung, S. S., 2022, 2022 IEEE Silicon Nanoelectronics Workshop, SNW 2022. Institute of Electrical and Electronics Engineers Inc., (2022 IEEE Silicon Nanoelectronics Workshop, SNW 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A New Cascode Design with Enhanced Power gain and Bandwidth for Application in mm-Wave Amplifier
Lin, J. M., Wijaya, A. C. & Guo, J. C., 2022, 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022. Institute of Electrical and Electronics Engineers Inc., (2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A Novel Physical Unclonable Function: NBTI-PUF Realized by Random Trap Fluctuation (RTF) Enhanced True Randomness in 14 nm FinFET Platform
Lin, L. C., Hsieh, E. R., Kao, T. C., Lee, M. Y., Chang, J. K., Guo, J. C., Chung, S. S., Chen, T. P., Huang, S. A., Chen, T. J. & Cheng, O., 2022, 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022. Institute of Electrical and Electronics Engineers Inc., (2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations -
Layout Optimization and Parasitic Reduction in Sub-60-nm nMOSFETs for Super-350-GHz fMAX
Guo, J. C. & Ou, J. R., 1 Jul 2022, In: IEEE Transactions on Electron Devices. 69, 7, p. 3589-3595 7 p.Research output: Contribution to journal › Article › peer-review
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NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFEto Break Great Memory Wall with 10 ns of PGM-pulse, 1010Cycles of Endurance, and Decade Lifetime at 103 °C
Hsieh, E. R., Chang, J. K., Tang, T. Y., Li, Y. J., Liang, C. W., Lin, M. Y., Huang, S. Y., Su, C. J., Guo, J. C. & Chung, S. S., 2022, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., p. 359-360 2 p. (Digest of Technical Papers - Symposium on VLSI Technology; vol. 2022-June).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations
Activities
- 1 Invited talk
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IMS 2013 MTT-14 workshop
Jyh-Chyurn Guo (Speaker)
1 Jun 2013Activity: Talk or presentation › Invited talk