Projects per year
Personal profile
Research Interests
Electronic Design Automation (EDA), Biochip Design Automation, Microprocessor Design, Silicon IP and SoC Design
Experience
Education/Academic qualification
PhD, National Chiao Tung University
External positions
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Dive into the research topics where Juinn-Dar Huang is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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通用於深度學習之神經網路加速器晶片開發暨產業落地(1/4)
1/05/22 → 30/04/23
Project: Government Ministry › Ministry of Science and Technology
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Edge-Intelligence-SOC Design and Verification Methodology Development
1/05/21 → 31/07/22
Project: Government Ministry › Ministry of Science and Technology
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Edge-Intelligence-SOC Design and Verification Methodology Development
1/05/20 → 30/04/21
Project: Government Ministry › Ministry of Science and Technology
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Edge-Intelligence-SOC Design and Verification Methodology Development
1/05/19 → 30/04/20
Project: Government Ministry › Ministry of Science and Technology
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Edge-Intelligence-SOC Design and Verification Methodology Development
1/05/18 → 30/04/19
Project: Government Ministry › Ministry of Science and Technology
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Fast Variation-aware Circuit Sizing Approach for Analog Design with ML-Assisted Evolutionary Algorithm
Song, L. Y., Kuo, T. C., Wang, M. H., Liu, C. N. J. & Huang, J. D., 2022, ASP-DAC 2022 - 27th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 80-85 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2022-January).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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An Efficient and Low-Power MLP Accelerator Architecture Supporting Structured Pruning, Sparse Activations and Asymmetric Quantization for Edge Computing
Lin, W. C., Chang, Y. C. & Huang, J. D., 6 Jun 2021, 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021. Institute of Electrical and Electronics Engineers Inc., 9458511. (2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations -
Design for Restricted-Area and Fast Dilution using Programmable Microfluidic Device based Lab-on-a-Chip
Ying, S., Roy, S., Huang, J. D. & Yamashita, S., 2021, Proceedings - 2021 24th Euromicro Conference on Digital System Design, DSD 2021. Leporati, F., Vitabile, S. & Skavhaug, A. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 488-494 7 p. (Proceedings - 2021 24th Euromicro Conference on Digital System Design, DSD 2021).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model
Wu, C. C., Hu, Y. H., Lin, C. C., Chen, Y. C., Huang, J. D. & Wang, C. Y., 5 Apr 2021, In: ACM Journal on Emerging Technologies in Computing Systems. 17, 2, 15.Research output: Contribution to journal › Article › peer-review
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Efficient circuit structure analysis for automatic behavioral model generation in mixed-signal system simulation
Song, L. Y., Lou, Y. K., Lin, C. H., Liu, C-N., Huang, J. D., Jou, J. Y., Lee, M. J. & Lo, Y. L., 1 May 2021, In: Electronics (Switzerland). 10, 9, 1088.Research output: Contribution to journal › Article › peer-review
Open Access