Projects per year
Personal profile
Research Interests
Mixed-signal Integrated Circuits
Experience
1992/2 - Present, Professor, National Chiao-Tung University, Department of Electronics Engineering
1988/2 - 1992/2, Member of Technical Staff, Hewlett-Packard Company, Microwave Semiconductor Division
Education/Academic qualification
PhD, Electrical Engineering, Stanford University
External positions
Fingerprint
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Network
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Analog Frontend for Advanced Data Link Transceivers
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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Analog Frontend for Advanced Data Link Transceivers
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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Analog Frontend for Advanced Data Link Transceivers
1/08/21 → 31/07/22
Project: Government Ministry › Other Government Ministry Institute
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Wide-Bandwidth Analog-Digital Interface
1/08/20 → 31/07/21
Project: Government Ministry › Other Government Ministry Institute
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THz Imaging Radar Baseband Signal Processor
1/05/19 → 31/07/20
Project: Government Ministry › Other Government Ministry Institute
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On Automating Finger-Cap Array Synthesis with Optimal Parasitic Matching for Custom SAR ADC
Chiang, C. Y., Hu, C. L., Lin, M. P. H., Chung, Y. S., Jou, S. J., Wu, J-T., Chiang, S. H. W., Liu, C-N. & Chen, H-M., 16 Jan 2023, ASP-DAC 2023 - 28th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 352-357 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
Open Access -
An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch
Swindlehurst, E., Jensen, H., Petrie, A., Song, Y., Kuan, Y-C., Qu, Y., Chang, M-C., Wu, J-T. & Chiang, S. H. W., Aug 2021, In: IEEE Journal of Solid-State Circuits. 56, 8, p. 2347 - 2359 13 p.Research output: Contribution to journal › Article › peer-review
6 Scopus citations -
A 1 V 175 mu W 94.6 dB SNDR 25 kHz Bandwidth Delta-Sigma Modulator Using Segmented Integration Techniques
Liao, S-H. & Wu, J-T., Sep 2019, In: IEEE Custom Integrated Circuits Conference. 54, 9, p. 2523 - 2531 4 p., 18937250.Research output: Contribution to journal › Article › peer-review
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A 1-V 175-μ W 94.6-dB SNDR 25-kHz Bandwidth Delta-Sigma Modulator Using Segmented Integration Techniques
Liao, S. H. & Wu, J-T., Sep 2019, In: IEEE Journal of Solid-State Circuits. 54, 9, p. 2523-2531 9 p., 8765753.Research output: Contribution to journal › Article › peer-review
6 Scopus citations -
An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC with Grouped DAC Capacitors and Dual-Path Bootstrapped Switch
Swindlehurst, E., Jensen, H., Petrie, A., Song, Y., Kuan, Y. C., Chang, M. C. F., Wu, J-T. & Chiang, S. H. W., Sep 2019, In: IEEE Solid-State Circuits Letters. 2, 9, p. 83-86 4 p., 8877924.Research output: Contribution to journal › Article › peer-review
8 Scopus citations