Projects per year
Personal profile
Research Interests
Electronic Design Automation, Design and Analysis of Algorithms, Combinatorial Optimization
Experience
Education/Academic qualification
PhD, Computer Sciences, University of Texas at Austin
External positions
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Dive into the research topics where Hung-Ming Chen is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
Projects
- 34 Finished
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一：設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
Chen, H.-M. (PI)
1/08/24 → 31/07/25
Project: Government Ministry › Other Government Ministry Institute
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一：設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
Chen, H.-M. (PI)
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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111年度晶片前瞻技術模組教材發展計畫-總計畫暨前瞻工具：2.5D/3D異質整合之系統規劃及實體設計
Chen, H.-M. (PI)
1/10/22 → 30/09/23
Project: Government Ministry › Ministry of Education(Include School)
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一：設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
Chen, H.-M. (PI)
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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以記憶體為中心的人工智慧邊緣產品EDA方案: 具重新配置能力的系統評估與實作(3/3)
Chen, H.-M. (PI)
1/11/21 → 28/02/23
Project: Government Ministry › Other Government Ministry Institute
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A PVT-Resilient Subthreshold SRAM-Based In-Memory Computing Accelerator With In-Situ Regulation for Energy-Efficient Spiking Neural Networks
Kao, S. H., Hung, Y. C., Wang, I. W., Liu, B. H., Chen, Y. C., Chang, T. S., Jou, S. J., Liu, C. N., Chen, H. M. & Chen, W. Z., 2026, (Accepted/In press) In: IEEE Transactions on Circuits and Systems I: Regular Papers.Research output: Contribution to journal › Article › peer-review
Open Access -
Optimizing Multibit Flip-Flop Banking via Agile In-Placement PPA Co-Optimization
Chen, H. Y., Lin, Y. R., Lin, M. P. H. & Chen, H. M., 2026, 2026 Design, Automation and Test in Europe Conference, DATE 2026 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (Proceedings -Design, Automation and Test in Europe, DATE).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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An Energy-Area-Efficient 3D Interleaved-Ring Accelerator With INT/FP Pipelined PE Array and 3D-SRAM Cube for On-Device CNN Training and DM Inference
Lu, W., Chen, H. M. & Huang, P. T., 2025, In: IEEE Transactions on Circuits and Systems I: Regular Papers. 72, 12, p. 7780-7793 14 p.Research output: Contribution to journal › Article › peer-review
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CFIRSTNET: Comprehensive Features for Static IR Drop Estimation with Neural Network
Liu, Y. T., Cheng, Y. H., Wu, S. Y. & Chen, H. M., 9 Apr 2025, Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2024. Institute of Electrical and Electronics Engineers Inc., 105. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
Open Access -
Clock and Power Supply-Aware High Accuracy Phase Interpolator Layout Synthesis
Lin, S. S., Chen, S. Y., Huang, Y. P., Lin, T. C., Chen, H. M. & Chen, W. Z., 2025, 2025 Design, Automation and Test in Europe Conference, DATE 2025 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (Proceedings -Design, Automation and Test in Europe, DATE).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review