Projects per year
Personal profile
Research Interests
Electronic Design Automation, Design and Analysis of Algorithms, Combinatorial Optimization
Experience
Education/Academic qualification
PhD, Computer Sciences, University of Texas at Austin
External positions
Fingerprint
- 1 Similar Profiles
Network
-
111年度晶片前瞻技術模組教材發展計畫-總計畫暨前瞻工具:2.5D/3D異質整合之系統規劃及實體設計
1/10/22 → 30/09/23
Project: Government Ministry › Ministry of Education(Include School)
-
從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一:設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
-
從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一:設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
1/08/24 → 31/07/25
Project: Government Ministry › Other Government Ministry Institute
-
從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一:設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
-
以記憶體為中心的人工智慧邊緣產品EDA方案: 具重新配置能力的系統評估與實作(3/3)
1/11/21 → 28/02/23
Project: Government Ministry › Other Government Ministry Institute
-
On Automating Finger-Cap Array Synthesis with Optimal Parasitic Matching for Custom SAR ADC
Chiang, C. Y., Hu, C. L., Lin, M. P. H., Chung, Y. S., Jou, S. J., Wu, J-T., Chiang, S. H. W., Liu, C-N. & Chen, H-M., 16 Jan 2023, ASP-DAC 2023 - 28th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 352-357 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
Open Access -
An Embedded Multi-Die Active Bridge (EMAB) Chip for Rapid-Prototype Programmable 2.5D/3D Packaging Technology
Zhang, J., Lu, W., Huang, P. T., Li, S. H., Hung, T. Y., Wu, S. H., Dai, M. J., Chung, I. S., Chen, W. C., Wang, C. H., Sheu, S. S., Chen, H. M., Chen, K. N., Lo, W. C. & Wu, C. I., 2022, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., p. 262-263 2 p. (Digest of Technical Papers - Symposium on VLSI Technology; vol. 2022-June).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
-
DASC: A DRAM Data Mapping Methodology for Sparse Convolutional Neural Networks
Lai, B. C., Chiang, T. C., Kuo, P. S., Wang, W. C., Hung, Y. L., Chen, H. M., Liu, C. N. & Jou, S. J., 2022, Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022. Bolchini, C., Verbauwhede, I. & Vatajelu, I. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 208-213 6 p. (Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
-
Digital Computation-in-Memory Design with Adaptive Floating Point for Deep Neural Networks
Yang, Y. R., Lu, W., Huang, P. T. & Chen, H. M., 2022, Proceedings - 2022 IEEE 15th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022. Institute of Electrical and Electronics Engineers Inc., p. 216-223 8 p. (Proceedings - 2022 IEEE 15th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
-
On Optimizing Capacitor Array Design for Advanced Node SAR ADC
Chiang, C. Y., Hu, C. L., Chang, K. Y., Lin, P-H., Jou, S. J., Chen, H. Y., Liu, C-N. & Chen, H-M., 2022, Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022. Institute of Electrical and Electronics Engineers Inc., (Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations