Projects per year
Personal profile
Research Interests
Electronic Design Automation, Design and Analysis of Algorithms, Combinatorial Optimization
Experience
Education/Academic qualification
PhD, Computer Sciences, University of Texas at Austin
External positions
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- 1 Similar Profiles
Collaborations and top research areas from the last five years
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一:設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
Chen, H.-M. (PI)
1/08/24 → 31/07/25
Project: Government Ministry › Other Government Ministry Institute
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一:設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
Chen, H.-M. (PI)
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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111年度晶片前瞻技術模組教材發展計畫-總計畫暨前瞻工具:2.5D/3D異質整合之系統規劃及實體設計
Chen, H.-M. (PI)
1/10/22 → 30/09/23
Project: Government Ministry › Ministry of Education(Include School)
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從平面到鰭式場效應電晶體的混合信號佈局合成和遷移-子計畫一:設計製程優化整合輔助的類比與混合訊號電路佈局自動合成
Chen, H.-M. (PI)
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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以記憶體為中心的人工智慧邊緣產品EDA方案: 具重新配置能力的系統評估與實作(3/3)
Chen, H.-M. (PI)
1/11/21 → 28/02/23
Project: Government Ministry › Other Government Ministry Institute
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GIRD: A Green IR-Drop Estimation Method
Yu, C. A., Liu, Y. T., Cheng, Y. H., Wu, S. Y., Chen, H. M. & Kuo, C. C. J., 2025, (Accepted/In press) In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.Research output: Contribution to journal › Article › peer-review
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3DIC with Stacked FinFET, Inter-Level Metal, and Field-Size (25 × 33mm2) Single-Crystalline Si on SiO2 by Elevated-Epi
Shih, B. J., Pan, Y. M., Chung, H. T., Lee, C. L., Hsieh, I. C., Lin, N. C., Yang, C. C., Huang, P. T., Chen, H. M., Wang, C. Y., Chiu, H. Y., Cheng, H. C., Shen, C. H., Wu, W. F., Hou, T. H., Chen, K. N. & Hu, C., 2024, 2024 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2024. Institute of Electrical and Electronics Engineers Inc., (Digest of Technical Papers - Symposium on VLSI Technology).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations -
A 28nm 343.5fps/W Vision Transformer Accelerator with Integer-Only Quantized Attention Block
Lin, C. C., Lu, W., Huang, P. T. & Chen, H. M., 2024, 2024 IEEE 6th International Conference on AI Circuits and Systems, AICAS 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 80-84 5 p. (2024 IEEE 6th International Conference on AI Circuits and Systems, AICAS 2024 - Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer Learning
Lu, W., Pei, H. H., Yu, J. R., Chen, H. M. & Huang, P. T., 2024, ISCAS 2024 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., (Proceedings - IEEE International Symposium on Circuits and Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area and Wire Optimization
Li, B. H., Lin, K. C., Zuo, H., Pan, P. C., Chen, H. M., Jou, S. J., Liu, C. N. J. & Lai, B. C., 2024, 2024 IEEE 67th International Midwest Symposium on Circuits and Systems, MWSCAS 2024. Institute of Electrical and Electronics Engineers Inc., p. 1085-1090 6 p. (Midwest Symposium on Circuits and Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review