Projects per year
Personal profile
Research Interests
Sensor Interface Circuits, Data Converters, Phase-locked Loop and Frequency Synthesizer, High-speed Wireline Transceivers and Building Blocks, DC-DC Power Converters
Experience
2013/12~2014/11 Senior Analog Design Engineer, Mediatek USA
2015/8~2016/12 Staff Analog Design Engineer, Faraday Technology USA
2017/1~2018/8 Technical Manager, Egis Technology Inc.
2018/8~Assistant Professor, Electrical and Computer Engineering, National Chiao Tung University
Education/Academic qualification
PhD, Electrical and Computer Engineering, Oregon State University
External positions
Fingerprint
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Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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下世代高速高解析度類比數位轉換器之功耗最佳化設計
Chen, C.-H. (PI)
1/08/24 → 31/07/25
Project: Government Ministry › Other Government Ministry Institute
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下世代高速高解析度類比數位轉換器之功耗最佳化設計
Chen, C.-H. (PI)
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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下世代高速高解析度類比數位轉換器之功耗最佳化設計
Chen, C.-H. (PI)
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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High-Precision Micro-Power Analog-to-Digital Converters for IoT Sensor Interfaces
Chen, C.-H. (PI)
1/01/21 → 31/12/21
Project: Government Ministry › Other Government Ministry Institute
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High-Precision Micro-Power Analog-to-Digital Converters for IoT Sensor Interfaces
Chen, C.-H. (PI)
1/01/20 → 31/12/20
Project: Government Ministry › Other Government Ministry Institute
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A 101-dB SFDR 98.5-dB DR 20-kHz BW Continuous Time Incremental Δ∑ ADC with FIR DAC and Robust Reset Timing for Sensor Interfaces
Wei, C. E., Wang, C. W., Hung, C. H., Wang, C. H., Chou, C. T., Hung, D. S., Lu, G. W. & Chen, C. H., 2024, 2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A 99.4 dB SFDR 91.9 dB DR Continuous-Time Incremental Delta-Sigma ADC with a Noise-Shaping SAR Quantizer and a Passive Input Feedforward Stabilization Path
Wei, C. E., Kuo, S. C. & Chen, C. H., 2024, 2024 IEEE Custom Integrated Circuits Conference, CICC 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (Proceedings of the Custom Integrated Circuits Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations -
A Resistor-Based High-Resolution Temperature-to-Digital Converter
Lee, R. S., Lam, C. H., Chen, W. H., Liu, C. F., Tsai, C. Y., Lu, C. J. & Chen, C. H., 2024, 2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A Low-Noise Area-Efficient Column-Parallel ADC With an Input Triplet for a 120-dB High Dynamic Range CMOS Image Sensor
Hsu, P. H., Lee, Y. R., Chen, C.-H. & Hung, C. C., 2023, (Accepted/In press) In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. p. 1-11 11 p.Research output: Contribution to journal › Article › peer-review
1 Scopus citations -
A Multistep Multistage Fifth-Order Incremental Delta Sigma Analog-to-Digital Converter for Sensor Interfaces
Huang, J. S., Kuo, S. C. & Chen, C. H., 1 Oct 2023, In: IEEE Journal of Solid-State Circuits. 58, 10, p. 2733-2744 12 p.Research output: Contribution to journal › Article › peer-review
3 Scopus citations