Projects per year
Personal profile
Research Interests
SoC and VLSI System Design, Computer-aided Design, Multi-core System Design
Experience
Education/Academic qualification
PhD, Electrical Engineering, University of California, Los Angeles
External positions
Fingerprint
- 1 Similar Profiles
Collaborations and top research areas from the last five years
Projects
- 26 Finished
-
針對巨量深度學習模型在可重組式近記憶體運算架構上之系統編譯與架構優化技術
Lai, B.-C. C. (PI)
1/08/24 → 31/07/25
Project: Government Ministry › Other Government Ministry Institute
-
針對巨量深度學習模型在可重組式近記憶體運算架構上之系統編譯與架構優化技術
Lai, B.-C. C. (PI)
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
-
針對巨量深度學習模型在可重組式近記憶體運算架構上之系統編譯與架構優化技術
Lai, B.-C. C. (PI)
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
-
SW/HW Acceleration Techniques For Intelligent Processing On Distributed Relational Database
Lai, B.-C. C. (PI)
1/08/21 → 31/07/22
Project: Government Ministry › Other Government Ministry Institute
-
Distributed Genome Assembly Acceleration Technique for Near DRAM Computing
Lai, B.-C. C. (PI)
1/11/20 → 30/04/22
Project: Government Ministry › Other Government Ministry Institute
-
A CIM Crossbar Array Data Mapping Methodology for Unstructured Sparse CNN
Hung, Y. L., Liu, P. H., Wu, Z. S., Lai, B. C. & Jou, S. J., 2025, AICAS 2025 - 2025 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, Proceedings. Institute of Electrical and Electronics Engineers Inc., (AICAS 2025 - 2025 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
-
Constrained Bi-Objective Pruning Framework for Ultra-Low Latency ML Inference on FPGAs
Chen, C. J., Chen, D., Lai, J. H., Lai, P. J., Hung, W. H. & Lai, B. C., 2025, 2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers. Institute of Electrical and Electronics Engineers Inc., (2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
-
Cross-Layer Cache Aggregation for Token Reduction in Ultra-Fine-Grained Image Recognition
Rios, E. A., Yuanda, J. C., Ghanz, V. L., Yu, C. W., Lai, B. C. & Hu, M. C., 2025, In: ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings.Research output: Contribution to journal › Conference article › peer-review
-
Design of a Low-Cost, High-Resolution Underwater Acoustic Imager With Integrated Deep Learning Enhancement
Hu, J. W., Lo, M. T., Chen, C. Y., Chuang, C. S., Yeh, C. L., Liu, F. B., Liu, P. Y., Yao, C. S., Lai, B. C., Nick Wang, H. C., Sang, T. H. & Jeng, G. S., 2025, In: IEEE Sensors Journal. 25, 23, p. 43256-43266 11 p.Research output: Contribution to journal › Article › peer-review
-
Down-Sampling Inter-layer Adapter for Parameter and Computation Efficient Ultra-Fine-Grained Image Recognition
Rios, E. A., Oyerinde, F., Hu, M. C. & Lai, B. C., 2025, Computer Vision – ECCV 2024 Workshops, Proceedings. Del Bue, A., Canton, C., Pont-Tuset, J. & Tommasi, T. (eds.). Springer Science and Business Media Deutschland GmbH, p. 43-54 12 p. (Lecture Notes in Computer Science; vol. 15633 LNCS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review