Projects per year
Personal profile
Research Interests
SoC and VLSI System Design, Computer-aided Design, Multi-core System Design
Experience
Education/Academic qualification
PhD, Electrical Engineering, University of California, Los Angeles
External positions
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針對巨量深度學習模型在可重組式近記憶體運算架構上之系統編譯與架構優化技術
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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針對巨量深度學習模型在可重組式近記憶體運算架構上之系統編譯與架構優化技術
1/08/24 → 31/07/25
Project: Government Ministry › Other Government Ministry Institute
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針對巨量深度學習模型在可重組式近記憶體運算架構上之系統編譯與架構優化技術
1/08/23 → 31/07/24
Project: Government Ministry › Other Government Ministry Institute
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SW/HW Acceleration Techniques For Intelligent Processing On Distributed Relational Database
1/08/21 → 31/07/22
Project: Government Ministry › Other Government Ministry Institute
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Distributed Genome Assembly Acceleration Technique for Near DRAM Computing
1/11/20 → 30/04/22
Project: Government Ministry › Other Government Ministry Institute
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A Highly Parallel Fine-Grained Sort-Merge Join on Near Memory Computing
Lin, P. Y., Kuo, Y. S. & Lai, B. C., 2022, IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc., p. 2566-2570 5 p. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2022-May).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Anime Character Recognition using Intermediate Features Aggregation
Rios, E. A., Hu, M. C. & Lai, B. C., 2022, IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc., p. 424-428 5 p. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2022-May).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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DASC: A DRAM Data Mapping Methodology for Sparse Convolutional Neural Networks
Lai, B. C., Chiang, T. C., Kuo, P. S., Wang, W. C., Hung, Y. L., Chen, H. M., Liu, C. N. & Jou, S. J., 2022, Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022. Bolchini, C., Verbauwhede, I. & Vatajelu, I. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 208-213 6 p. (Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Distributed Sorting Architecture on Multiple FPGA
Hsin, Y. D., Kuo, Y. S. & Lai, B. C., 2022, 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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DLPrPPG: Development and Design of Deep Learning Platform for Remote Photoplethysmography
Yan, B. R., Rios, E. A., Lee, W. H. & Lai, B. C., 2022, IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc., p. 697-701 5 p. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2022-May).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review