Projects per year
Personal profile
Research Interests
Semiconductor Physics & Devices, IC Technologies, Electrical Characterization Measurement & Analyses
Experience
Education/Academic qualification
PhD, National Yang Ming Chiao Tung University
External positions
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Dive into the research topics where Bing-Yue Tsui is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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高壓碳化矽元件與電路之單晶片應用整合(1/2)
1/05/22 → 30/04/23
Project: Government Ministry › Ministry of Science and Technology
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SiC CMOS Device and IC Process Technology
1/05/21 → 31/10/22
Project: Government Ministry › Ministry of Science and Technology
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SiC CMOS Device and IC Process Technology
1/05/20 → 31/07/21
Project: Government Ministry › Ministry of Science and Technology
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SiC CMOS Device and IC Process Technology
1/05/19 → 30/04/20
Project: Government Ministry › Ministry of Science and Technology
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碳化矽單晶片功率系統平台-大型儀器(總計畫)-碳化矽蝕刻系統(碳化矽互補式金氧半場效應電晶體元件與積體電路製程技術)
1/05/18 → 30/04/19
Project: Government Ministry › Ministry of Science and Technology
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Defect Inspection Techniques in SiC
Chen, P. C., Miao, W. C., Ahmed, T., Pan, Y. Y., Lin, C. L., Chen, S. C., Kuo, H. C., Tsui, B. Y. & Lien, D. H., 2022, In: Nanoscale Research Letters. 17, 1, 30.Research output: Contribution to journal › Review article › peer-review
Open Access -
Dual Gate Oxide CMOS Process on 4H-SiC
Tsui, B. Y., Hung, C. L., Tsai, T. K., Lin, L. J., Wang, T. W. & Chen, P-H., 2022, 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022. Institute of Electrical and Electronics Engineers Inc., (2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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1100 V, 22.9 mΩcm24H-SiC RESURF Lateral Double-Implanted MOSFET with Trench Isolation
Hu, J. W., Jiang, J. Y., Chen, W. C., Huang, C. F., Wu, T-L., Lee, K. Y. & Tsui, B. Y., Oct 2021, In: IEEE Transactions on Electron Devices. 68, 10, p. 5009-5013 5 p.Research output: Contribution to journal › Article › peer-review
1 Scopus citations -
A Study on the Isolation Ability of LOCal Oxidation of SiC (LOCOSiC) for 4H-SiC CMOS Process
Tsui, B. Y., Tsai, T. K., Lu, Y. T., Lin, J. H., Hung, C. L. & Wen, Y. X., Dec 2021, In: IEEE Transactions on Electron Devices. 68, 12, p. 6644 - 6647 4 p.Research output: Contribution to journal › Article › peer-review
1 Scopus citations -
High voltage gain 4H-SIC CMOS technology featuring LOCal oxidation of SiC (LOCOSiC) isolation and balanced gate dielectric
Tsui, B. Y., Hung, C. L., Jhuang, Y. R., Huang, Y. T., Cheng, J. C., Lu, F. H., Shih, Y. T., Lee, Y. H., Chen, L. Y., Chuang, F. H. & Li, P. W., 19 Apr 2021, VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc., 9440126. (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
1 Scopus citations