Projects per year
Personal profile
Research Interests
Semiconductor Physics & Devices, IC Technologies, Electrical Characterization Measurement & Analyses
Experience
Education/Academic qualification
PhD, Electronics Engineering, National Yang Ming Chiao Tung University
External positions
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Dive into the research topics where Bing-Yue Tsui is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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碳化矽局部氧化隔離結構之抗輻射能力研究
1/08/22 → 31/07/23
Project: Government Ministry › Other Government Ministry Institute
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高壓碳化矽元件與電路之單晶片應用整合(1/2)
1/05/22 → 30/04/23
Project: Government Ministry › Other Government Ministry Institute
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SiC CMOS Device and IC Process Technology
1/05/21 → 30/04/23
Project: Government Ministry › Other Government Ministry Institute
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SiC CMOS Device and IC Process Technology
1/05/20 → 31/07/21
Project: Government Ministry › Other Government Ministry Institute
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SiC CMOS Device and IC Process Technology
1/05/19 → 30/04/20
Project: Government Ministry › Other Government Ministry Institute
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An Evaluation for Quality Inspection of Epitaxial Layer and Heavily-doped 4H-SiC Substrate by Simple Schottky Barrier Diode and MOS Capacitor
Chu, K. W., Tseng, C. W., Tsui, B. Y., Wu, Y. C. S., Yang, C. J. & Hsu, C., 2022, 2022 IEEE 34th International Conference on Microelectronic Test Structures, ICMTS 2022 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (IEEE International Conference on Microelectronic Test Structures; vol. 2022-March).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Defect Inspection Techniques in SiC
Chen, P. C., Miao, W. C., Ahmed, T., Pan, Y. Y., Lin, C. L., Chen, S. C., Kuo, H. C., Tsui, B. Y. & Lien, D. H., 2022, In: Nanoscale Research Letters. 17, 1, 30.Research output: Contribution to journal › Review article › peer-review
Open Access5 Scopus citations -
Design, Process, and Characterization of Complementary Metal-Oxide-Semiconductor Circuits and Six-Transistor Static Random-Access Memory in 4H-SiC
Hung, C. L., Tsui, B. Y., Tsai, T. K., Lin, L. J. & Wen, Y. X., Apr 2022, In: ECS Journal of Solid State Science and Technology. 11, 4, 045001.Research output: Contribution to journal › Article › peer-review
Open Access -
Design and Characterization of the Junction Isolation Structure for Monolithic Integration of Planar CMOS and Vertical Power MOSFET on 4H-SiC up to 300 °C
Tsui, B. Y., Tsai, T. K., Hung, C. L. & Wen, Y. X., 2022, 2022 International Electron Devices Meeting, IEDM 2022. Institute of Electrical and Electronics Engineers Inc., p. 931-934 4 p. (Technical Digest - International Electron Devices Meeting, IEDM; vol. 2022-December).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Device isolation process for 4H-SiC CMOS ICs
Tsui, B. Y., Jhuang, Y. R., Lin, J. H., Huang, Y. T., Tsai, T. K., Hsu, K. T., Su, Y. H. & Hsieh, Y. F., 2022, 6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022. Institute of Electrical and Electronics Engineers Inc., p. 238-240 3 p. (6th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2022).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review